In this paper, we propose a novel quantum-dot cellular automata (QCA) adder design and that decrease the number of QCA cells used in previous existing designs. The proposed one-bit QCA adder design is based on a new algorithm that contains three majority gates and two inverters for the binary addition. A novel 64-bit adder designed in QCA was implemented. It yields speed performances higher than the existing designs. QCA adders area requirements are comparable with the RCA and CFA. The novel adder operates in the RCA fashion, but it can propagate a carry signal through a number of cascaded MGs significantly lower than the conventional RCA adders. Our proposed QCA Adder architecture will be used as a real time Digital Counter or Clock Circuits. Here we implemented a stop watch using this QCA adder architecture.