Performance Analysis of Mesh, Torus and Folded Torus under Broadcasting, using Distance Vector Algorithm

Abstract

In this technological world of communication architecture, network on chip (NoC) is extensively used as communication architecture. Network on chip (NoC) topologies are becoming a backbone of communication architectures. It provides a good integration of enormous amount of storage on chip blocks as well as computational also. Network on chip handled the unfavorable conditions and it provides the scalability to the architecture. Mesh, Torus and folded torus architectures are most commonly used architecture for network on chip communication. Here, we compare the performance of Mesh, Tours and Folded torus network architecture on chip, on the basis of different parameters under broadcasting with the help of distance vector routing algorithm. To evaluate the performance of Mesh, Torus and folded torus network on chip in the simulation environment, we simulate the topology using Network Simulator (NS-2).