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FPGA Implementation of Binary Coded Decimal Digit Adder and Multiplier

Authors

Amruta Bhamburkar1

Abstract

Arithmetic has gained high impact on the overall performance of today’s financial and commercial applications. Decimal additions and multiplication are the main decimal operations used in any decimal arithmetic algorithm. Decimal digit adders and decimal digit multipliers are usually the building blocks for higher order decimal adders and multipliers. FPGAs provide an efficient hardware platform that can be employed for accelerating decimal algorithms. 

Article Details

Published

2014-11-28

Section

Articles

How to Cite

FPGA Implementation of Binary Coded Decimal Digit Adder and Multiplier. (2014). International Journal of Engineering and Computer Science, 3(11). https://ijecs.in/index.php/ijecs/article/view/2465