Signal Processing in Neural Network using VLSI Implementation

Abstract

Artificial intelligence is realized based on many things like mathematical equations and artificial neurons. In the proposed design, we will mainly focus on the implementation of chip layout design for Feed Forward Neural Network Architecture (NNA) in VLSI for analog signal processing applications. The analog components like Gilbert Cell Multiplier (GCM), Adders, Neuron activation Function (NAF) are used in the implementation. This neural architecture is trained using Back propagation (BP) algorithm in analog domain with new techniques of weight storage. We are using 45nm CMOS technology for layout designing and verification of proposed neural network. The proposed design of neural network will be verified for analog operations like signal amplification and frequency multiplication.