Sankarnarayana Bhat.M, Muhammed Asharaf.T.P, Manu Ramesh,. “Design and Implementation of High Performance Bus Architecture Using FPGA”. International Journal of Engineering and Computer Science 3, no. 06 (December 30, 2017). Accessed July 22, 2024. https://ijecs.in/index.php/ijecs/article/view/755.