This paper implements a design of a 4-bit Arithmetic Logic Unit (ALU) using the concept of gated diffusion index (GDI) technique. In central processing unit and microprocessors ALU is the most crucial component. 4x1 multiplexer, 2x1 multiplexer and full adder are used in ALU design to implement the arithmetic operations such as ADD,SUBSTRACT etc. and logical operations such as AND,OR. In multiplexers and full adders GDI cells are used. The simulation is carried out Tanner EDA 13.0 simulator using TSMC BSIM 250nm technologies and compared with previous designs realized with Pass transistor logic and CMOS logic. CMOS uses both PMOS and NMOS transistors. CMOS design gives high power dissipation, and delay is also high. The occupation of area is also high.  The simulation shows that the design is more efficient with less power consumption, less surface area and is faster as compared to pass transistor and CMOS techniques.