1.
Mr. S. Sakthivel M.E MKR. Design And Implementation Of High Efficient And Performance Of Modified Adder Circuit Using 128 Bit CSLA And BEC Adder For Filter Design. int. jour. eng. com. sci [Internet]. 2015 May 28 [cited 2024 Nov. 23];4(05). Available from: http://ijecs.in/index.php/ijecs/article/view/3548