M.MAHABOOB BASHA, S. S. :THE POWER CONSTRAINT AND REMEDIAL METHOD IN DESIGN OF VARIATION TRAINED DROWSY CACHE(VTD- CACHE) IN VLSI SYSTEM DESIGN. International Journal of Engineering and Computer Science, india, v. 2, n. 10, 2013. Disponível em: http://ijecs.in/index.php/ijecs/article/view/1954. Acesso em: 25 apr. 2024.